XCENA designs the MX1, a prototype chip that brings compute into the memory module via CXL to process data inside DRAM modules and reduce expensive round trips between CPUs, GPUs, and memory. The company says the approach handles preprocessing, KV cache management, and data caching within memory, potentially shrinking infrastructure needs (claiming workloads that once required 10 servers could run on one). XCENA’s cores are built on RISC-V and the company emphasizes vertical integration, designing its own memory hierarchy, interconnect bus, and DRAM controller. The startup was founded in 2022 by Jin Kim, Dohun Kim, and Harry Juhyun Kim and has offices in Pangyo and Sunnyvale with over 90 staff. XCENA positions itself against rivals like Astera Labs and Marvell and plans mass production at Samsung foundries by the end of 2026 with revenue expected to begin in 2027; to date it has raised $185 million.

Total raised

$184M

Funding rounds

3

Latest round

Series B

Latest activity

May 2026